FRER_Control_1B (GEM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

FRER_Control_1B (GEM) Register Description

Register NameFRER_Control_1B
Relative Address0x00000008C4
Absolute Address 0x00FF0C08C4 (GEM0)
0x00FF0D08C4 (GEM1)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFRER control register B. This register has default values where the sequence number length defaults to 16 and the vector recovery window defaults to the size of the history vector. It is not expected that the user will need to change these default values.

Alternate register name: frer_control_1_b

FRER_Control_1B (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:13roRead-only0x0Reserved, read as 0, ignored on write.
seq_num_length12:8rwNormal read/write0x0Number of significant bits of the 802.1CB sequence number. The value 0x00 or numbers greater than 16 bits are equivalent to 16, but the number written will still be read back if it is greater than 16. If a value of less than 16 is written then the sequence recovery algorithm will only consider that number of LSBs of the sequence number. The minimum size of seq_num_length has to be such that 2^seq_num_len is at least 2xgem_seq_history_len otherwise the vector recovery algorithm will not work correctly - this bit should only be changed when en_elimination is low
Reserved 7:6roRead-only0x0Reserved, read as 0, ignored on write.
seq_rec_window 5:0rwNormal read/write0x0Vector recovery window, defines the window size used by the vector recovery algorithm to determine whether to reject a packet. Six bits allow a window size of 63, for effective operation of FRER users should not write a value greater than the gem_seq_history_len configuration define, a value of zero means the entire history vector is used - this bit should only be changed when en_elimination is low.