PMEVCNTR3_EL0 (DBG_A720_PMU) Register Description
| Register Name | PMEVCNTR3_EL0 |
|---|---|
| Relative Address | 0x0000000018 |
| Absolute Address | 0x00F0D20018 (DBG_APU0_PMU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Performance Monitors Event Count Registers |
PMEVCNTR3_EL0 (DBG_A720_PMU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PMN | 31:0 | rwNormal read/write | 0x0 | Event counter n. Value of event counter n, where n is the number of this register and is a number from 0 to 30. |