ASICCTL (DBG_CTI) Register Description
Register Name | ASICCTL |
---|---|
Relative Address | 0x0000000144 |
Absolute Address |
0x00F0CA0144 (DBG_APU_CTI) 0x00F0FD0144 (DBG_CPM_CTI) 0x00F0FA0144 (DBG_CPM_ELA_CTI) 0x00F0BD0144 (DBG_FPD_CTI) 0x00F0BC0144 (DBG_FPD_PSPL_CTI) 0x00F0BB0144 (DBG_FPD_SOC_CTI) 0x00F09D0144 (DBG_LPD_CTI) 0x00F08D0144 (DBG_PMC_CTI) 0x00F0A10144 (DBG_RPU0_CTI) 0x00F0A50144 (DBG_RPU1_CTI) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Implementation-defined ASIC control, value written to the register is output on asicctl[7:0]. |
ASICCTL (DBG_CTI) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
ASICCTL | 7:0 | rwNormal read/write | 0x0 | Implementation-defined ASIC control, value written to the register is output on asicctl[7:0].If external multiplexing of trigger signals is implemented then the number of multiplexed signals on each trigger must be reflected within the Device ID Register. This is done within a Verilog define EXTMUXNUM. |