rpu0_intlpd_axi_rd_I_main_QosGenerator_Bandwidth (LPD_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

rpu0_intlpd_axi_rd_I_main_QosGenerator_Bandwidth (LPD_INT_GPV) Register Description

Register Namerpu0_intlpd_axi_rd_I_main_QosGenerator_Bandwidth
Relative Address0x0000000A10
Absolute Address 0x00FE400A10 (LPD_INT_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000D55
Descriptionrpu0_intlpd_axi_rd_I_main_QosGenerator_Bandwidth

Alternate register name: if_rpu0_intlpd_axi_rd_I_main_QosGenerator_Bandwidth

rpu0_intlpd_axi_rd_I_main_QosGenerator_Bandwidth (LPD_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
BANDWIDTH11:0rwNormal read/write0xD55Defines the bandwidth threshold in 1/256th-byte-per-cycle units. In other words, the desired rate in MBps is divided by frequency in MHz of the NIU, and then multiplied by 256.