INT_STAT_1 (PMC_GPIO) Register Description
| Register Name | INT_STAT_1 |
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| Relative Address | 0x0000000258 |
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| Absolute Address |
0x00F1020258 (PMC_GPIO)
|
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| Width | 32 |
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| Type | mixedMixed types. See bit-field details. |
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| Reset Value | 0x00000000 |
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| Description | Interrupt Status (GPIO Bank1, MIO) |
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This register operates in exactly the same manner as INT_STAT_0, except that it reflects bank1, which corresponds to MIO[51:26].
INT_STAT_1 (PMC_GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:26 | razRead as zero | 0x0 | Not used, read back as zero |
| INT_STATUS_1 | 25:0 | wtcReadable, write a 1 to clear | 0x0 | Operation is the same as INT_STAT_0[INT_STATUS_0] |