MIO_PIN_18 (LPD_IOP_SLCR) Register Description
| Register Name | MIO_PIN_18 |
|---|---|
| Relative Address | 0x0000000048 |
| Absolute Address | 0x00FF080048 (LPD_IOP_SLCR) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | LPD MIO Pin 18 |
MIO_PIN_18 (LPD_IOP_SLCR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:10 | razRead as zero | 0x0 | reserved |
| L3_SEL | 9:7 | rwNormal read/write | 0x0 | Level 3 Mux Select 0: reserved 1: SPI1_SCLK input/output 2: PCIe_RESET1_b input 3: CAN0_RX input 4: LPD_I2C0_SCL input/output 5: TTC2_CLK input 6: SWDT1_CLK input 7: SYSMON_I2C_SCL input/output |
| L2_SEL | 6:5 | rwNormal read/write | 0x0 | Level 2 Mux Select 0: Level 3 Mux 1: UART0_CTS_b input 2: LPD_GPIO[18] input/output 3: reserved |
| L1_SEL | 4:3 | rwNormal read/write | 0x0 | Level 1 Mux Select 0: Level 2 Mux 1: TRACE_DATA[10] output 2: reserved 3: reserved |
| L0_SEL | 2:1 | rwNormal read/write | 0x0 | Level 0 Mux Select 0: Level 1 Mux 1: reserved 2: GEM1_RX_CLK input 3: reserved |
| Reserved | 0 | razRead as zero | 0x0 | reserved |