CONTROL (MB_TMR_INJECT) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

CONTROL (MB_TMR_INJECT) Register Description

Register NameCONTROL
Relative Address0x0000000000
Absolute Address 0x00F0284000 (PPU_TMR_INJECT)
0x00FFCD0000 (PSM_TMR_INJECT)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionTMR Inject Control Inject

CONTROL (MB_TMR_INJECT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:11woWrite-only0x0reserved
INJECT10woWrite-only0x0Enables fault injection. Automatically cleared after a fault has been injected:
0: No fault is injected.
1:
Inject fault when Address Inject Register is equal to PC.
CPU 9:8woWrite-only0x0CPU identifier that must match parameter C_CPU_ID (1,2,3) to enable injection.
Magic 7:0woWrite-only0x0Magic byte that must match parameter C_MAGIC (0x27) to enable injection.