intlpd_ocm_axi_power_main_ResilienceFaultController_LatentFault0 (LPD_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

intlpd_ocm_axi_power_main_ResilienceFaultController_LatentFault0 (LPD_INT_GPV) Register Description

Register Nameintlpd_ocm_axi_power_main_ResilienceFaultController_LatentFault0
Relative Address0x0000000F98
Absolute Address 0x00FE400F98 (LPD_INT_GPV)
Width32
TyperoRead-only
Reset Value0x00000000
Descriptionintlpd_ocm_axi_power_main_ResilienceFaultController_LatentFault0

Alternate register name: if_intlpd_ocm_axi_power_main_ResilienceFaultController_LatentFault0

intlpd_ocm_axi_power_main_ResilienceFaultController_LatentFault0 (LPD_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
LATENTFAULT031:0roRead-only0x0LatentFault0 register, see MissionFault0 for bit details