CPM_PS_AXI_FPD_Write_QoS_BW (FPD_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

CPM_PS_AXI_FPD_Write_QoS_BW (FPD_INT_GPV) Register Description

Register NameCPM_PS_AXI_FPD_Write_QoS_BW
Relative Address0x0000000390
Absolute Address 0x00FD700390 (FPD_INT_GPV)
Width32
TyperwNormal read/write
Reset Value0x00001000
DescriptionCPM_PS_AXI_FPD_Write_QoS_BW

Alternate register name: if_cci_pcie_sw_wr_I_main_QosGenerator_Bandwidth

CPM_PS_AXI_FPD_Write_QoS_BW (FPD_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
BANDWIDTH12:0rwNormal read/write0x1000Defines the bandwidth threshold in 1/256th-byte-per-cycle units. In other words, the desired rate in MBps is divided by frequency in MHz of the NIU, and then multiplied by 256.