APB_IMR (PMC_ANLG) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

APB_IMR (PMC_ANLG) Register Description

Register NameAPB_IMR
Relative Address0x0000000044
Absolute Address 0x00F1160044 (PMC_ANLG)
Width32
TyperoRead-only
Reset Value0x00000001
DescriptionAPB Interrrupt Mask

Interrupt Mask Bits (read-only): 0: unmasked interrupt (enabled) 1: masked interrupt (disabled) Note: Refer to the APB_ISR register for more information. Alternate register name: PMC_ANLG_IMR

APB_IMR (PMC_ANLG) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
APB_Error 0roRead-only0x1Address decode error.
Note: Field name reference: SLVERR