PFx_DLL_FEATURE_CAP_NEXTPTR_2 (CPM5_PCIE_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PFx_DLL_FEATURE_CAP_NEXTPTR_2 (CPM5_PCIE_ATTR) Register Description

Register NamePFx_DLL_FEATURE_CAP_NEXTPTR_2
Relative Address0x0000001EF4
Absolute Address 0x00FCE09EF4 (CPM5_PCIE0_ATTR)
0x00FCE89EF4 (CPM5_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDLL Feature Cap Next Pointer

This register should only be written to during reset of the PCIe block

PFx_DLL_FEATURE_CAP_NEXTPTR_2 (CPM5_PCIE_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr11:0rwNormal read/write0x0DLL Feature Cap Next Pointer