PMDEVAFF0 (DBG_A720_PMU) Register Description
| Register Name | PMDEVAFF0 |
|---|---|
| Relative Address | 0x0000000FA8 |
| Absolute Address | 0x00F0D20FA8 (DBG_APU0_PMU) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x80000000 |
| Description | Device Affinity Register 0 |
PMDEVAFF0 (DBG_A720_PMU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31 | roRead-only | 0x1 | Reserved |
| U | 30 | roRead-only | 0x0 | Core is part of a cluster |
| MT | 24 | roRead-only | 0x0 | Performance of cores at the lowest affinity level is largely independent. |
| Cluster_ID_AFF2 | 23:16 | roRead-only | 0x0 | Indicates the value read in at reset from the CLUSTERIDAFF2 configuration signal. |
| Cluster_ID_AFF1 | 15:8 | roRead-only | 0x0 | Indicates the value read in at reset from the CLUSTERIDAFF1 configruation signal. |
| CPU | 1:0 | roRead-only | 0x0 | Indicates the core number |