C2H1_POLLMODE_WRITEBACK_ADDRESS_HIGH (CPM4_XDMA_CSR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

C2H1_POLLMODE_WRITEBACK_ADDRESS_HIGH (CPM4_XDMA_CSR) Register Description

Register NameC2H1_POLLMODE_WRITEBACK_ADDRESS_HIGH
Relative Address0x000000118C
Absolute Address 0x00E100118C (CPM4_XDMA_CSR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionC2H1_POLLMODE_WRITEBACK_ADDRESS_HIGH

C2H1_POLLMODE_WRITEBACK_ADDRESS_HIGH (CPM4_XDMA_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
pollmode_hi_wb_addr31:0rwNormal read/write0x0Upper 32 bits of the poll mode writeback address.[63:32]