ADDR_DECODE_IR_STATUS (CPM5_INT_CSR) Register Description
| Register Name | ADDR_DECODE_IR_STATUS |
|---|---|
| Relative Address | 0x0000000104 |
| Absolute Address | 0x00FCA00104 (CPM5_INT_CSR) |
| Width | 32 |
| Type | wtcReadable, write a 1 to clear |
| Reset Value | 0x00000000 |
| Description | Interrupt Status Register. This is a sticky register that holds the value of the interrupt until cleared by a value of 1. |
ADDR_DECODE_IR_STATUS (CPM5_INT_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:1 | wtcReadable, write a 1 to clear | 0x0 | reserved |
| addr_decode_err | 0 | wtcReadable, write a 1 to clear | 0x0 | Status for an address decode error interrupt. |