intlpd_cpmpcsr_apb_power_main_ResilienceFaultController_IntClr (LPD_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

intlpd_cpmpcsr_apb_power_main_ResilienceFaultController_IntClr (LPD_INT_GPV) Register Description

Register Nameintlpd_cpmpcsr_apb_power_main_ResilienceFaultController_IntClr
Relative Address0x0000000E30
Absolute Address 0x00FE400E30 (LPD_INT_GPV)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionInterruptClear register

Alternate register name: if_intlpd_cpmpcsr_apb_power_main_ResilienceFaultController_IntClr

intlpd_cpmpcsr_apb_power_main_ResilienceFaultController_IntClr (LPD_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MISSIONFAULTCLR 1wtcReadable, write a 1 to clear0x0Clear Mission Fault
LATENTFAULTCLR 0wtcReadable, write a 1 to clear0x0Clear Latent Fault