PL_INFER_EI_DISABLE_REC_SPD (CPM4_PCIE0_ATTR) Register Description
Register Name | PL_INFER_EI_DISABLE_REC_SPD |
Relative Address | 0x00000001A8 |
Absolute Address |
0x00FCA501A8 (CPM4_PCIE0_ATTR)
|
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Infer EI Disable in REC SPEED. Used for debug. |
This register should only be written to during reset of the PCIe block
PL_INFER_EI_DISABLE_REC_SPD (CPM4_PCIE0_ATTR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
attr | 0 | rwNormal read/write | 0x0 | Infer EI Disable in REC SPEED. Used for debug. |