mst_win_map_entry_reg1 (CPM5_DMA_CSR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID: AM012
Release Date: 2023-08-29
Revision: 1.3

mst_win_map_entry_reg1 (CPM5_DMA_CSR) Register Description

Register Name	mst_win_map_entry_reg1
Relative Address	0x0000000F18
Absolute Address	0x00FCE20F18 (CPM5_DMA0_CSR) 0x00FCEA0F18 (CPM5_DMA1_CSR)
Width	32
Type	mixedMixed types. See bit-field details.
Reset Value	0x00000000
Description	Register to program the Bridge Master Window Map Table. Indirect register, Set bit 31 to 1 to update the entry. The SW needs to program this table before any bridge master transactions.

mst_win_map_entry_reg1 (CPM5_DMA_CSR) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
update_enable	31	woWrite-only	0x0	Set to 1 to update entry. Read returns 1 for this field always.
rsvd	30:27	razRead as zero	0x0	Reserved. Read returns 0 for this field.
pers_id	26:22	rwNormal read/write	0x0	Entry Number/Personality ID to be programmed/read. Upto 32 personalities supported.
tar_num	21:19	rwNormal read/write	0x0	Target Number to be prgrammed/Read. Upto 8 targets supported.
base_addr_id	18:13	rwNormal read/write	0x0	Base Address ID to index into Noc Base address Table
win_en	12	rwNormal read/write	0x0	Window Enable
win_size	11:7	rwNormal read/write	0x0	Window Size in 4kB
bar_id	6:4	rwNormal read/write	0x0	BAR ID
bar_off_msb	3:0	rwNormal read/write	0x0	Bar Offset [35:32]