TZ_CPI1 (CPM5_SLCR_SECURE) Register Description
Register Name | TZ_CPI1 |
---|---|
Relative Address | 0x0000000124 |
Absolute Address | 0x00FCDE0124 (CPM5_SLCR_SECURE) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000003 |
Description | TrustZone Classification for CPI blocks 1: Non-Secure 0: Secure |
This register should only be written to while the target block is in reset.
TZ_CPI1 (CPM5_SLCR_SECURE) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:2 | roRead-only | 0x0 | Reserved |
port_cfg | 1 | rwNormal read/write | 0x1 | CHI Interface TrustZone classification setting |
port_en | 0 | rwNormal read/write | 0x1 | CHI Interface TrustZone classification enable. 1: Override the NS bit of Request flit with port_cfg 0: Do not override the NS bit of Request flit |