TRCACVRL3 (DBG_A720_ETM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

TRCACVRL3 (DBG_A720_ETM) Register Description

Register NameTRCACVRL3
Relative Address0x0000000418
Absolute Address 0x00F0D30418 (DBG_APU0_ETM)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAddress Comparator Value Register 3

TRCACVRL3 (DBG_A720_ETM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ADDRESS31:0rwNormal read/write0Address value. The address comparators can support implementations that use multiple address widths. When the trace unit compares the ADDRESS field with an address that has a width less than this field, then it must ignore those upper bits in the comparison. For example, in a system that supports both 32-bit and 64-bit addresses, when the processor is in 32-bit state the comparator must ignore the ADDRESS[63:32] bits.