DBG_A721_DBG Module Description
| Module Name | DBG_A721_DBG Module |
|---|---|
| Modules of this Type | DBG_APU1_DBG |
| Base Address | 0x00F0D40000 (DBG_APU1_DBG) |
| Description | CoreSight APU core 1 Built-in Debug Logic |
DBG_A721_DBG Module Register Summary
| Register Name | Address | Width | Type | Reset Value | Description |
|---|---|---|---|---|---|
| EDESR | 0x0000000020 | 32 | rwNormal read/write | 0x00000000 | External Debug Event Status Register |
| EDECR | 0x0000000024 | 32 | rwNormal read/write | 0x00000000 | External Debug Execution Control Register |
| EDWARL | 0x0000000030 | 32 | rwNormal read/write | 0x00000000 | External Debug Watchpoint Address Register (low word) |
| EDWARH | 0x0000000034 | 32 | rwNormal read/write | 0x00000000 | External Debug Watchpoint Address Register (high word) |
| DBGDTRRX_EL0 | 0x0000000080 | 32 | rwNormal read/write | 0x00000000 | Debug Data Transfer Register Receive |
| EDITR | 0x0000000084 | 32 | woWrite-only | 0x00000000 | External Debug Instruction Transfer Register |
| EDSCR | 0x0000000088 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | External Debug Status and Control Register |
| DBGDTRTX_EL0 | 0x000000008C | 32 | rwNormal read/write | 0x00000000 | Debug Data Transfer Register Transmit |
| EDRCR | 0x0000000090 | 32 | woWrite-only | 0x00000000 | External Debug Reserve Control Register |
| EDACR | 0x0000000094 | 32 | rwNormal read/write | 0x00000000 | External Debug Auxiliary Control Register |
| EDECCR | 0x0000000098 | 32 | rwNormal read/write | 0x00000000 | External Debug Exception Catch Control Register |
| EDPCSRlo | 0x00000000A0 | 32 | rwNormal read/write | 0x00000000 | External Debug Program Counter Sample Register (low word) |
| EDCIDSR | 0x00000000A4 | 32 | rwNormal read/write | 0x00000000 | External Debug Context ID Sample Register |
| EDVIDSR | 0x00000000A8 | 32 | rwNormal read/write | 0x00000000 | External Debug Virtual Context Sample Register |
| EDPCSRhi | 0x00000000AC | 32 | roRead-only | 0x00000000 | External Debug Program Counter Sample Register (high word) |
| OSLAR_EL1 | 0x0000000300 | 32 | woWrite-only | 0x00000000 | OS Lock Access Register |
| EDPRCR | 0x0000000310 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | External Debug Power/Reset Control Register |
| EDPRSR | 0x0000000314 | 32 | roRead-only | 0x0000002B | External Debug Processor Status Register |
| DBGBVR0L_EL1 | 0x0000000400 | 32 | rwNormal read/write | 0x00000000 | Debug Breakpoint Value Registers. Holds a virtual address or a VMID and/or a context ID for use in breakpoint matching. Forms breakpoint n together with control register DBGBCR<n>_EL1 where n is 0 to 15. Multiple uses of this register refer to ARMv8 |
| DBGBVR0H_EL1 | 0x0000000404 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Debug Breakpoint Extended Value Registers. Holds a virtual address or a VMID and/or a context ID for use in breakpoint matching. Forms breakpoint n together with control register DBGBCR<n>_EL1 where n is 0 to 15. Multiple uses of this register refer to ARMv8 |
| DBGBCR0_EL1 | 0x0000000408 | 32 | rwNormal read/write | 0x00000000 | Debug Breakpoint Control Registers |
| DBGBVR1L_EL1 | 0x0000000410 | 32 | rwNormal read/write | 0x00000000 | DBGBVR1L_EL1 |
| DBGBVR1H_EL1 | 0x0000000414 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGBVR1H_EL1 |
| DBGBCR1_EL1 | 0x0000000418 | 32 | rwNormal read/write | 0x00000000 | DBGBCR1_EL1 |
| DBGBVR2L_EL1 | 0x0000000420 | 32 | rwNormal read/write | 0x00000000 | DBGBVR2L_EL1 |
| DBGBVR2H_EL1 | 0x0000000424 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGBVR2H_EL1 |
| DBGBCR2_EL1 | 0x0000000428 | 32 | rwNormal read/write | 0x00000000 | DBGBCR2_EL1 |
| DBGBVR3L_EL1 | 0x0000000430 | 32 | rwNormal read/write | 0x00000000 | DBGBVR3L_EL1 |
| DBGBVR3H_EL1 | 0x0000000434 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGBVR3H_EL1 |
| DBGBCR3_EL1 | 0x0000000438 | 32 | rwNormal read/write | 0x00000000 | DBGBCR3_EL1 |
| DBGBVR4L_EL1 | 0x0000000440 | 32 | rwNormal read/write | 0x00000000 | DBGBVR4L_EL1 |
| DBGBVR4H_EL1 | 0x0000000444 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGBVR4H_EL1 |
| DBGBCR4_EL1 | 0x0000000448 | 32 | rwNormal read/write | 0x00000000 | DBGBCR4_EL1 |
| DBGBVR5L_EL1 | 0x0000000450 | 32 | rwNormal read/write | 0x00000000 | DBGBVR5L_EL1 |
| DBGBVR5H_EL1 | 0x0000000454 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGBVR5H_EL1 |
| DBGBCR5_EL1 | 0x0000000458 | 32 | rwNormal read/write | 0x00000000 | DBGBCR5_EL1 |
| DBGWVR0L_EL1 | 0x0000000800 | 32 | rwNormal read/write | 0x00000000 | Debug Watchpoint Value Registers |
| DBGWVR0H_EL1 | 0x0000000804 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Debug Watchpoint Extended Value Registers |
| DBGWCR0_EL1 | 0x0000000808 | 32 | rwNormal read/write | 0x00000000 | Debug Watchpoint Control Registers |
| DBGWVR1L_EL1 | 0x0000000810 | 32 | rwNormal read/write | 0x00000000 | DBGWVR1L_EL1 |
| DBGWVR1H_EL1 | 0x0000000814 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGWVR1H_EL1 |
| DBGWCR1_EL1 | 0x0000000818 | 32 | rwNormal read/write | 0x00000000 | DBGWCR1_EL1 |
| DBGWVR2L_EL1 | 0x0000000820 | 32 | rwNormal read/write | 0x00000000 | DBGWVR2L_EL1 |
| DBGWVR2H_EL1 | 0x0000000824 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGWVR2H_EL1 |
| DBGWCR2_EL1 | 0x0000000828 | 32 | rwNormal read/write | 0x00000000 | DBGWCR2_EL1 |
| DBGWVR3L_EL1 | 0x0000000830 | 32 | rwNormal read/write | 0x00000000 | DBGWVR3L_EL1 |
| DBGWVR3H_EL1 | 0x0000000834 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | DBGWVR3H_EL1 |
| DBGWCR3_EL1 | 0x0000000838 | 32 | rwNormal read/write | 0x00000000 | DBGWCR3_EL1 |
| MIDR_EL1 | 0x0000000D00 | 32 | roRead-only | 0x410FD083 | Main ID Register |
| ID_AA64PFR0L_EL1 | 0x0000000D20 | 32 | roRead-only | 0x01002222 | Processor Feature Register 0 (low word) |
| ID_AA64PFR0H_EL1 | 0x0000000D24 | 32 | roRead-only | 0x00000000 | Processor Feature Register 0 (high word) |
| ID_AA64DFR0L_EL1 | 0x0000000D28 | 32 | roRead-only | 0x10305106 | Debug Feature Register 0 (low word) |
| ID_AA64DFR0H_EL1 | 0x0000000D2C | 32 | roRead-only | 0x00000000 | Debug Feature Register 0 (high word) |
| ID_AA64ISAR0L_EL1 | 0x0000000D30 | 32 | roRead-only | 0x00011120 | Instruction Set Attribute Register 0 (low word) |
| ID_AA64ISAR0H_EL1 | 0x0000000D34 | 32 | roRead-only | 0x00000000 | Instruction Set Attribute Register 0 (high word) |
| ID_AA64MMFR0L_EL1 | 0x0000000D38 | 32 | roRead-only | 0x00001124 | Memory Model Feature Register 0 (low word) |
| ID_AA64MMFR0H_EL1 | 0x0000000D3C | 32 | roRead-only | 0x00000000 | Memory Model Feature Register 0 (high word) |
| EDITOCTRL | 0x0000000EF8 | 32 | woWrite-only | 0x00000000 | External Debug Integration Output Control Register |
| EDITISR | 0x0000000EFC | 32 | roRead-only | 0x00000000 | External Debug Integration Input Status Register |
| EDITCTRL | 0x0000000F00 | 32 | rwNormal read/write | 0x00000000 | External Debug Integration mode Control Register |
| DBGCLAIMSET_EL1 | 0x0000000FA0 | 32 | rwNormal read/write | 0x000000FF | Debug Claim Tag Set Register |
| DBGCLAIMCLR_EL1 | 0x0000000FA4 | 32 | rwNormal read/write | 0x00000000 | Debug Claim Tag Clear Register |
| EDDEVAFF0 | 0x0000000FA8 | 32 | roRead-only | 0x80000001 | External Debug Device Affinity Register 0 |
| EDDEVAFF1 | 0x0000000FAC | 32 | roRead-only | 0x00000000 | External Debug Device Affinity Register 1 |
| EDLAR | 0x0000000FB0 | 32 | woWrite-only | 0x00000000 | External Debug Lock Access Register |
| EDLSR | 0x0000000FB4 | 32 | roRead-only | 0x00000003 | External Debug Lock Status Register |
| DBGAUTHSTATUS | 0x0000000FB8 | 32 | roRead-only | 0x00000000 | Debug Authentication Status register |
| EDDEVARCH | 0x0000000FBC | 32 | roRead-only | 0x47706A15 | External Debug Device Architecture Register |
| EDDEVID2 | 0x0000000FC0 | 32 | roRead-only | 0x00000000 | External Debug Device ID Register 2 |
| EDDEVID1 | 0x0000000FC4 | 32 | roRead-only | 0x00000002 | External Debug Device ID Register 1 |
| EDDEVID | 0x0000000FC8 | 32 | roRead-only | 0x01000003 | External Debug Device ID Register 0 |
| EDDEVTYPE | 0x0000000FCC | 32 | roRead-only | 0x00000015 | External Debug Device Type Register |