APB_IMR (CRL) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

APB_IMR (CRL) Register Description

Register NameAPB_IMR
Relative Address0x0000000008
Absolute Address 0x00FF5E0008 (CRL)
Width 1
TyperoRead-only
Reset Value0x00000001
DescriptionAddress Decode Interrupt Mask

Read-only: 0: interrupt not masked (enabled) 1: interrupt masked (disabled) Clear a mask bit by writing to the IER register. Set a mask bit by writing to the IDR register. Alternate register name: IR_MASK

APB_IMR (CRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0roRead-only0x1Address decode error interrupt.