SMMU_CB16_PMCR (FPD_SMMU_TCU) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID: AM012
Release Date: 2023-08-29
Revision: 1.3

SMMU_CB16_PMCR (FPD_SMMU_TCU) Register Description

Register Name	SMMU_CB16_PMCR
Relative Address	0x0000030F04
Absolute Address	0x00FD830F04 (FPD_SMMU_TCU)
Width	32
Type	mixedMixed types. See bit-field details.
Reset Value	0x00000000
Description	Provides the equivalent of the PMCR register, in the register map of a translation context bank. PMCR provides controls for the Performance Monitors.

SMMU_CB16_PMCR (FPD_SMMU_TCU) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
IMP	31:24	roRead-only	0x0	Provides the equivalent of the PMCR register, in the register map of a translation context bank. PMCR provides controls for the Performance Monitors.
X	4	rwNormal read/write	0x0	Provides the equivalent of the PMCR register, in the register map of a translation context bank. PMCR provides controls for the Performance Monitors.
P	1	roRead-only	0x0	Provides the equivalent of the PMCR register, in the register map of a translation context bank. PMCR provides controls for the Performance Monitors.
E	0	rwNormal read/write	0x0	Provides the equivalent of the PMCR register, in the register map of a translation context bank. PMCR provides controls for the Performance Monitors.