TRCIDR4 (DBG_A720_ETM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

TRCIDR4 (DBG_A720_ETM) Register Description

Register NameTRCIDR4
Relative Address0x00000001F0
Absolute Address 0x00F0D301F0 (DBG_APU0_ETM)
Width32
TyperoRead-only
Reset Value0x11170004
DescriptionID Register 4

TRCIDR4 (DBG_A720_ETM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
NUMVMIDC31:28roRead-only0x1Indicates the number of VMID comparators that are available for tracing.
NUMCIDC27:24roRead-only0x1Indicates the number of Context ID comparators that are available for tracing.
NUMSSCC23:20roRead-only0x1Indicates the number of single-shot comparator controls that are available for tracing.
NUMRSPAIR19:16roRead-only0x7Indicates the number of resource selection pairs that are available for tracing.
NUMPC15:12roRead-only0x0Indicates the number of processor comparator inputs that are available for tracing.
SUPPDAC 8roRead-only0x0Indicates if the implementation can support data address comparisons
NUMDVC 7:4roRead-only0x0Indicates the number of data value comparators that are available for tracing.
NUMACPPAIRS 3:0roRead-only0x4Indicates the number of address comparator pairs that are available for tracing.