LAR (DBG_R51_ETM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

LAR (DBG_R51_ETM) Register Description

Register NameLAR
Relative Address0x0000000FB0
Absolute Address 0x00F0A70FB0 (DBG_RPU1_ETM)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionLock Access Register

LAR (DBG_R51_ETM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
KEY31:0woWrite-only0x0Lock Access control. Writing the key value 0xC5ACCE55 to this field unlocks the lock, enabling write accesses to this components registers through a memory-mapped interface. Writing any other value to this register locks the lock, disabling write accesses to this components registers through a memory mapped interface.