MIO_PIN_3 (LPD_IOP_SLCR) Register Description
| Register Name | MIO_PIN_3 |
|---|---|
| Relative Address | 0x000000000C |
| Absolute Address | 0x00FF08000C (LPD_IOP_SLCR) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | LPD MIO Pin 3 |
MIO_PIN_3 (LPD_IOP_SLCR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:10 | razRead as zero | 0x0 | reserved |
| L3_SEL | 9:7 | rwNormal read/write | 0x0 | Level 3 Mux Select 0: reserved 1: SPI0_CS0_b input/output 2: reserved 3: CAN0_TX output 4: LPD_I2C0_SDA input/output 5: TTC2_WAVE output 6: SWDT0_INT output 7: reserved |
| L2_SEL | 6:5 | rwNormal read/write | 0x0 | Level 2 Mux Select 0: Level 3 Mux 1: UART0_RTS_b output 2: LPD_GPIO[3] input/output 3: reserved |
| L1_SEL | 4:3 | rwNormal read/write | 0x0 | Level 1 Mux Select 0: Level 2 Mux 1: TRACE_DATA[0] output 2: reserved 3: reserved |
| L0_SEL | 2:1 | rwNormal read/write | 0x0 | Level 0 Mux Select 0: Level 1 Mux 1: reserved 2: GEM0_TX_DATA[2] output 3: reserved |
| Reserved | 0 | razRead as zero | 0x0 | reserved |