attr_dma_eqdma_dec (CPM5_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

attr_dma_eqdma_dec (CPM5_DMA_ATTR) Register Description

Register Nameattr_dma_eqdma_dec
Relative Address0x0000000764
Absolute Address 0x00FCE10764 (CPM5_DMA0_ATTR)
0x00FCE90764 (CPM5_DMA1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
Descriptionattr_dma_eqdma_dec

This register should only be written to during reset of the PCIe block

attr_dma_eqdma_dec (CPM5_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
eqdma_en25rwNormal read/write0x0DMA Enable
tz_prot24:22rwNormal read/write0x0TZ
eqdma_csr_size21:20rwNormal read/write0x0EQDMA CSR size 1 << (eqdma_csr_size+12)
badr19:0rwNormal read/write0x0Bits[31:12] of badr