zFx_MSIX_CAP_TABLE_BIR_2 (CPM4_PCIE0_ATTR) Register Description
| Register Name | zFx_MSIX_CAP_TABLE_BIR_2 |
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| Relative Address | 0x0000000688 |
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| Absolute Address |
0x00FCA50688 (CPM4_PCIE0_ATTR)
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| Width | 32 |
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| Type | rwNormal read/write |
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| Reset Value | 0x00000000 |
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| Description | MSI-X Table BIR. This value is transferred to the MSI-X Table BIR field. Set to 0 if MSI-X is not enabled.When AXISTEN_IF_ENABLE_INTERNAL_MSIX_TABLE = TRUE, only PF0 value will be used. |
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This register should only be written to during reset of the PCIe block
zFx_MSIX_CAP_TABLE_BIR_2 (CPM4_PCIE0_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
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| attr | 2:0 | rwNormal read/write | 0x0 | MSI-X Table BIR. This value is transferred to the MSI-X Table BIR field. Set to 0 if MSI-X is not enabled.When AXISTEN_IF_ENABLE_INTERNAL_MSIX_TABLE = TRUE, only PF0 value will be used. |