attr_dma_rq_rcfg_en (CPM5_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

attr_dma_rq_rcfg_en (CPM5_DMA_ATTR) Register Description

Register Nameattr_dma_rq_rcfg_en
Relative Address0x000000017C
Absolute Address 0x00FCE1017C (CPM5_DMA0_ATTR)
0x00FCE9017C (CPM5_DMA1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionTie 0.
Check for infinite credits, and consumed credits on reset exit

This register should only be written to during reset of the PCIe block

attr_dma_rq_rcfg_en (CPM5_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0Tie 0.
Check for infinite credits, and consumed credits on reset exit