SMMU_CB19_TTBR1_high (FPD_SMMU_TCU) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

SMMU_CB19_TTBR1_high (FPD_SMMU_TCU) Register Description

Register NameSMMU_CB19_TTBR1_high
Relative Address0x000003302C
Absolute Address 0x00FD83302C (FPD_SMMU_TCU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionThe Translation Table Base register 0 holds the base address of the translation table 1.

SMMU_CB19_TTBR1_high (FPD_SMMU_TCU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ASID31:16rwNormal read/write0The Translation Table Base register 0 holds the base address of the translation table 1.
address15:0rwNormal read/write0The Translation Table Base register 0 holds the base address of the translation table 1.