AXIBAR_1L (CPM4_XDMA_CSR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

AXIBAR_1L (CPM4_XDMA_CSR) Register Description

Register NameAXIBAR_1L
Relative Address0x0000000EEC
Absolute Address 0x00E1000EEC (CPM4_XDMA_CSR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionRegister to configure AXI BAR Address Translation - 1L

AXIBAR_1L (CPM4_XDMA_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
lower_addr31:0rwNormal read/write0x0Creates the address for PCIe-this is the value substituted for the least significant 32 bits of the AXI BAR1