intlpd_rpu1_axi_power_main_ResilienceFaultController_IntEn (LPD_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

intlpd_rpu1_axi_power_main_ResilienceFaultController_IntEn (LPD_INT_GPV) Register Description

Register Nameintlpd_rpu1_axi_power_main_ResilienceFaultController_IntEn
Relative Address0x00000010AC
Absolute Address 0x00FE4010AC (LPD_INT_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterruptEnable register

Alternate register name: if_intlpd_rpu1_axi_power_main_ResilienceFaultController_IntEn

intlpd_rpu1_axi_power_main_ResilienceFaultController_IntEn (LPD_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MISSIONFAULTEN 1rwNormal read/write0x0MissionFault Interrupt enable
BISTDONEEN 0rwNormal read/write0x0BistDone Interrupt enable