PFx_PASID_CAP_MAX_PASID_WIDTH_4 (CPM5_PCIE_ATTR) Register Description
Register Name | PFx_PASID_CAP_MAX_PASID_WIDTH_4 |
---|---|
Relative Address | 0x0000002008 |
Absolute Address |
0x00FCE0A008 (CPM5_PCIE0_ATTR) 0x00FCE8A008 (CPM5_PCIE1_ATTR) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Max PASID Width. Permitted to be in the range 0D (single PASID) to 20D (all PASID value (20 bits)) |
This register should only be written to during reset of the PCIe block
PFx_PASID_CAP_MAX_PASID_WIDTH_4 (CPM5_PCIE_ATTR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr | 4:0 | rwNormal read/write | 0x0 | Max PASID Width. Permitted to be in the range 0D (single PASID) to 20D (all PASID value (20 bits)) |