PFx_AER_CAP_NEXTPTR_2 (CPM4_PCIE1_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PFx_AER_CAP_NEXTPTR_2 (CPM4_PCIE1_ATTR) Register Description

Register NamePFx_AER_CAP_NEXTPTR_2
Relative Address0x0000000770
Absolute Address 0x00FCA60770 (CPM4_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAERs Next Capability Offset pointer to the next item in the capabilities list, or 000h if this is the final capability.

This register should only be written to during reset of the PCIe block

PFx_AER_CAP_NEXTPTR_2 (CPM4_PCIE1_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr11:0rwNormal read/write0x0AERs Next Capability Offset pointer to the next item in the capabilities list, or 000h if this is the final capability.