STMPIDR2 (DBG_STM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

STMPIDR2 (DBG_STM) Register Description

Register NameSTMPIDR2
Relative Address0x0000000FE8
Absolute Address 0x00F0B70FE8 (DBG_STM)
Width32
TyperoRead-only
Reset Value0x0000001B
DescriptionPart of the set of Peripheral Identification registers. Contains part of the designer identity and the product revision.

STMPIDR2 (DBG_STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
REVISION 7:4roRead-only0x1An incremental value starting at 0x0 for the first design of this component. The value increases by one for both major and minor revisions and is used as a look-up to establish the exact major and minor revision.
JEDEC 3roRead-only0x1Indicates the use of a JEDEC assigned value. This bit is always set.
DES_1 2:0roRead-only0x3Bits [6:4] of the JEDEC identity code indicating the designer of the component, together with the continuation code.