ERSTBA_LO_0 (USB_XHCI) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ERSTBA_LO_0 (USB_XHCI) Register Description

Register NameERSTBA_LO_0
Relative Address0x0000000470
Absolute Address 0x00FE200470 (USB2_XHCI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionEvent Ring Segment Table Base Address Low, Instance 0

For a description of this standard USB register, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification

ERSTBA_LO_0 (USB_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ERS_TABLE_BAR31:6rwNormal read/write0x0Base address, low
Reserved 5:0roRead-only0x0Reserved