DIDR (DBG_R50_DBG) Register Description
| Register Name | DIDR |
|---|---|
| Relative Address | 0x0000000000 |
| Absolute Address | 0x00F0A00000 (DBG_RPU0_DBG) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x77040013 |
| Description | Debug ID register |
DIDR (DBG_R50_DBG) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| WRP | 31:28 | roRead-only | 0x7 | Number of Watchpoint Register Pairs: 0111 = 8 WRPs |
| BRP | 27:24 | roRead-only | 0x7 | Number of Breakpoint Register Pairs: 0111 = 8 BRPs |
| Context | 23:20 | roRead-only | 0x0 | Number of Breakpoint Register Pairs (BRP) with context ID comparison capability: 0000 = 1 BRP has context IDcomparison capability |
| Arch_Ver | 19:16 | roRead-only | 0x4 | Debug architecture version: 0100 denotes ARMv7 Debug |
| DEVID_imp | 15 | roRead-only | 0x0 | Indicates whether DEVID is implemented. 0x0 = not implemented |
| Variant | 7:4 | roRead-only | 0x1 | Implementation-defined variant number. This is the major revision number n in the rn part of the rnpn description of the product revision status. |
| Revision | 3:0 | roRead-only | 0x3 | Implementation-defined revisionnumber. This is the minor revision number n in the pn part of the rnpn description of the product revision status. |