LSR (DBG_A721_CTI) Register Description
| Register Name | LSR |
|---|---|
| Relative Address | 0x0000000FB4 |
| Absolute Address | 0x00F0D50FB4 (DBG_APU1_CTI) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000003 |
| Description | This indicates the status of the Lock control mechanism. This lock prevents accidental writes by code under debug. When locked, write access is blocked to all registers, except the Lock Access Register.External accesses from a debugger (paddrdbg31 = 1) are not subject to the Lock Registers. This register reads as 0 when read from an external debugger (paddrdbg31 = 1). |
LSR (DBG_A721_CTI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| LOCKTYPE | 2 | roRead-only | 0x0 | Indicates if the Lock Access Register (0xFB0) is implemented as 8-bit or 32-bit |
| LOCKGRANT | 1 | roRead-only | 0x1 | Returns the current status of the Lock. This bit reads as 0 when read from an external debugger (paddrdbg31 = 1) since external debugger accesses are not subject to Lock Registers. |
| LOCKEXIST | 0 | roRead-only | 0x1 | Indicates that a lock control mechanism exists for this device. This bit reads as 0 when read from an external debugger (paddrdbg31 = 1) since external debugger accesses are not subject to Lock Registers. |