TRISTATE_OVERRIDE (PMC_GLOBAL) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

TRISTATE_OVERRIDE (PMC_GLOBAL) Register Description

Register NameTRISTATE_OVERRIDE
Relative Address0x0000000328
Absolute Address 0x00F1110328 (PMC_GLOBAL)
Width 1
TyperwNormal read/write
Reset Value0x00000000
DescriptionTristate I/O Buffer Override

Reserved for RCU BootROM code and PLM Firmware Alternate register name: USR_GTS

TRISTATE_OVERRIDE (PMC_GLOBAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved 0rwNormal read/write0x00: normal operation
1: all I/O buffers are put into their tristate mode
Note: Field name reference: usr_gts