STMITATBCTR2 (DBG_STM) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

STMITATBCTR2 (DBG_STM) Register Description

Register NameSTMITATBCTR2
Relative Address0x0000000EF0
Absolute Address 0x00F0B70EF0 (DBG_STM)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionReturns the value of the ATREADYM and AFVALIDM inputs in integration mode.

STMITATBCTR2 (DBG_STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
AFVALIDM_R 1roRead-only0Reads the value of the AFVALIDM input:
ATREADYM_R 0roRead-only0Reads the value of the ATREADYM input: