intfpd_intlpd_axi_wr_I_main_QosGenerator_Priority (LPD_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

intfpd_intlpd_axi_wr_I_main_QosGenerator_Priority (LPD_INT_GPV) Register Description

Register Nameintfpd_intlpd_axi_wr_I_main_QosGenerator_Priority
Relative Address0x0000000388
Absolute Address 0x00FE400388 (LPD_INT_GPV)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x80000700
DescriptionPriority register.

Alternate register name: if_intfpd_intlpd_axi_wr_I_main_QosGenerator_Priority

intfpd_intlpd_axi_wr_I_main_QosGenerator_Priority (LPD_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MARK31roRead-only0x1Backward compatibility marker when 0.
P110:8rwNormal read/write0x7In Regulator mode, defines the HIGH hurry level. In Fixed/Limiter mode, defines the Urgency level for READ transactions.
P0 2:0rwNormal read/write0x0In Regulator mode, defines the LOW hurry level. In Fixed/Limiter mode, defines the Urgency level for WRITE transactions.