TL_CREDITS_PH (CPM4_PCIE0_ATTR) Register Description
| Register Name | TL_CREDITS_PH |
|---|---|
| Relative Address | 0x00000003B8 |
| Absolute Address | 0x00FCA503B8 (CPM4_PCIE0_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Receiver Credit Limit for Posted Header. Unit is number of TLPs. Supported values are: 20H when TL_POSTED_RAM_SIZE = 0b, 7FH when TL_POSTED_RAM_SIZE = 1b |
This register should only be written to during reset of the PCIe block
TL_CREDITS_PH (CPM4_PCIE0_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 7:0 | rwNormal read/write | 0x0 | Receiver Credit Limit for Posted Header. Unit is number of TLPs. Supported values are: 20H when TL_POSTED_RAM_SIZE = 0b, 7FH when TL_POSTED_RAM_SIZE = 1b |