H2C3_CHANNEL_PERFORMANCE_CYCLE_COUNT0 (CPM4_XDMA_CSR) Register Description
Register Name | H2C3_CHANNEL_PERFORMANCE_CYCLE_COUNT0 |
---|---|
Relative Address | 0x00000003C4 |
Absolute Address | 0x00E10003C4 (CPM4_XDMA_CSR) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | H2C3_CHANNEL_PERFORMANCE_CYCLE_COUNT0 |
H2C3_CHANNEL_PERFORMANCE_CYCLE_COUNT0 (CPM4_XDMA_CSR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
pmon_cyc_count | 31:0 | roRead-only | 0x0 | pmon_cyc_count[31:0]. Increments once per clock while running. See PerformanceControl.Clear and PerformanceControl.Auto for clearing. |