PFx_SUB_SYSTEM_ID_ATTR_OVERRIDE_2 (CPM5_PCIE_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PFx_SUB_SYSTEM_ID_ATTR_OVERRIDE_2 (CPM5_PCIE_ATTR) Register Description

Register NamePFx_SUB_SYSTEM_ID_ATTR_OVERRIDE_2
Relative Address0x00000008A8
Absolute Address 0x00FCE088A8 (CPM5_PCIE0_ATTR)
0x00FCE888A8 (CPM5_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSub-System ID Override: Per Function Sub-System ID Override
1b - PFx_SUB_SYSTEM_ID is used by the function. 0b - cfg_subsys_id[15:0] input port is used by the function.

This register should only be written to during reset of the PCIe block

PFx_SUB_SYSTEM_ID_ATTR_OVERRIDE_2 (CPM5_PCIE_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0Sub-System ID Override: Per Function Sub-System ID Override
1b - PFx_SUB_SYSTEM_ID is used by the function. 0b - cfg_subsys_id[15:0] input port is used by the function.