dma0_intcpm_axi_power_main_ResilienceFaultController_Id_CoreId (CPM5_INT_GPV) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

dma0_intcpm_axi_power_main_ResilienceFaultController_Id_CoreId (CPM5_INT_GPV) Register Description

Register Namedma0_intcpm_axi_power_main_ResilienceFaultController_Id_CoreId
Relative Address0x0000001880
Absolute Address 0x00FCD81880 (CPM5_INT_GPV)
Width32
TyperoRead-only
Reset Value0xD55BAE16
DescriptionStores the Core Id and its checksum.

Alternate register name: if_dma0_intcpm_axi_power_main_ResilienceFaultController_Id_CoreId

dma0_intcpm_axi_power_main_ResilienceFaultController_Id_CoreId (CPM5_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CoreChecksum31:8roRead-only0xD55BAEField containing a checksum of the parameters of the IP.
CoreTypeId 7:0roRead-only0x16Field identifying the type of IP.