Field Name | Bits | Type | Reset Value | Description |
npi3_error_interrupt | 25 | woWrite-only | 0x0 | Enable for NPI GT Quad 3 error interrupt. |
npi2_error_interrupt | 24 | woWrite-only | 0x0 | Enable for NPI GT Quad 2 error interrupt. |
npi1_error_interrupt | 23 | woWrite-only | 0x0 | Enable for NPI GT Quad 1 error interrupt. |
npi0_error_interrupt | 22 | woWrite-only | 0x0 | Enable for NPI GT Quad 0 error interrupt. |
cxs1_error_interrupt | 21 | woWrite-only | 0x0 | Enable for cxs1 upsizer error interrupt. |
cxs0_error_interrupt | 20 | woWrite-only | 0x0 | Enable for cxs0 upsizer error interrupt. |
cpipe_err | 19 | woWrite-only | 0x0 | Enable for interrupt from CPIPE |
crx_pll_lock | 18 | woWrite-only | 0x0 | Enable for PLL lock from CRX |
intcpm_isr | 17 | woWrite-only | 0x0 | Enable for Latent/mission/dataparity and timeout interrupt from Interconnect |
pl_irq1 | 16 | woWrite-only | 0x0 | Enable for interrupt 1 from PL |
pl_irq0 | 15 | woWrite-only | 0x0 | Enable for interrupt 0 from PL |
cpi1_err | 14 | woWrite-only | 0x0 | Enable for error interrupt from CPI 1 |
cpi0_err | 13 | woWrite-only | 0x0 | Enable for error interrupt from CPI 0 |
addrremap_err | 12 | woWrite-only | 0x0 | Enable for addresss translation error interrupt from addrremap block |
l2_cache1_uncorr_err | 11 | woWrite-only | 0x0 | Enable for uncorrectable error from L2 cache 1 |
l2_cache1_corr_err | 10 | woWrite-only | 0x0 | Enable for correctable error from L2 cache 1 |
l2_cache0_uncorr_err | 9 | woWrite-only | 0x0 | Enable for uncorrectable error from L2 cache 0 |
l2_cache0_corr_err | 8 | woWrite-only | 0x0 | Enable for correctable error from L2 cache 0 |
cmn_pmu_event | 7 | woWrite-only | 0x0 | Enable for performance counter overflow interrupt from CMN |
cmn_faults | 6 | woWrite-only | 0x0 | Enable for secure fault interrupt from CMN |
cmn_faultns | 5 | woWrite-only | 0x0 | Enable for non-secure fault interrupt from CMN |
cmn_errs | 4 | woWrite-only | 0x0 | Enable for secure error interrupt from CMN |
cmn_errns | 3 | woWrite-only | 0x0 | Enable for non-secure error interrupt from CMN |
pcie1_err | 2 | woWrite-only | 0x0 | Enable for pcie1 interrupt events and errors |
pcie0_err | 1 | woWrite-only | 0x0 | Enable for pcie0 interrupt events and errors |
apb_err | 0 | woWrite-only | 0x0 | Enable for an APB error interrupt. |