noc_ps_cci_axi0_wr_I_main_QosGenerator_ExtControl (FPD_INT_GPV) Register Description
| Register Name | noc_ps_cci_axi0_wr_I_main_QosGenerator_ExtControl |
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| Relative Address | 0x0000000898 |
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| Absolute Address |
0x00FD700898 (FPD_INT_GPV)
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| Width | 32 |
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| Type | rwNormal read/write |
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| Reset Value | 0x00000000 |
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| Description | External inputs control. |
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Alternate register name: if_noc_ps_cci_axi0_wr_I_main_QosGenerator_ExtControl
noc_ps_cci_axi0_wr_I_main_QosGenerator_ExtControl (FPD_INT_GPV) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
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| EXTLIMITEN | 3 | rwNormal read/write | 0x0 | When register field ExtLimitEn is set, the bandwidth limiter is enabled when input signal ExtThr is asserted. When the signal is not asserted, the limiter is disabled: bandwidth is not limited, and the counter is stuck to 0. When the bit is cleared, the limiter operates normally and ignores ExtThr. |
| INTCLKEN | 2 | rwNormal read/write | 0x0 | When set to 1, register field IntClkEn causes the QoS generator to use the NIU clock for bandwidth calculation. When set to 0, and if configuration parameter useExternalReference is set to True, an external reference clock at the socket is used for bandwidth calculation. |
| EXTTHREN | 1 | rwNormal read/write | 0x0 | When register field ExtThrEn is set, internal signals Urgency, Press and Hurry are driven, when input signal ExtThr is low, by the value in register Priority field P0. When ExtThr is high, they are drven by the value in register Priority field P1. |
| SOCKETQOSEN | 0 | rwNormal read/write | 0x0 | Register field SocketQosEn determines how priority levels are driven when QoS generators and socket interfaces alternatively drive the levels for Urgency, Pressure, and Hurry signals: When set to 0, the QoS generator drives the levels. When set to 1, internal signals Pressure and Hurry are driven by the greater of the two levels from the socket interface or the QoS generator. |