PF0_VC_CAP_ENABLE (CPM4_PCIE0_ATTR) Register Description
| Register Name | PF0_VC_CAP_ENABLE |
|---|---|
| Relative Address | 0x000000074C |
| Absolute Address | 0x00FCA5074C (CPM4_PCIE0_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | VC Capability Structure Enable When TRUE, enabled VC0-TCx operation. When FALSE, hides the capability completely (VC0-TC0 operation). |
This register should only be written to during reset of the PCIe block
PF0_VC_CAP_ENABLE (CPM4_PCIE0_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 | VC Capability Structure Enable When TRUE, enabled VC0-TCx operation. When FALSE, hides the capability completely (VC0-TC0 operation). |