PF0_CCIX_ESM_QUICK_EQ_TIMEOUT (CPM5_PCIE_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PF0_CCIX_ESM_QUICK_EQ_TIMEOUT (CPM5_PCIE_ATTR) Register Description

Register NamePF0_CCIX_ESM_QUICK_EQ_TIMEOUT
Relative Address0x0000001E18
Absolute Address 0x00FCE09E18 (CPM5_PCIE0_ATTR)
0x00FCE89E18 (CPM5_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPF0 CCIX Transport DVSEC Quick EQ Timeout

This register should only be written to during reset of the PCIe block

PF0_CCIX_ESM_QUICK_EQ_TIMEOUT (CPM5_PCIE_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 2:0rwNormal read/write0x0PF0 CCIX Transport DVSEC Quick EQ Timeout