PF0_CCIX_PDVSEC_PCR_START_ADDR (CPM4_PCIE0_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

PF0_CCIX_PDVSEC_PCR_START_ADDR (CPM4_PCIE0_ATTR) Register Description

Register NamePF0_CCIX_PDVSEC_PCR_START_ADDR
Relative Address0x0000000A70
Absolute Address 0x00FCA50A70 (CPM4_PCIE0_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPF0 CCIX Protocol DVSEC CR Region Start Address

This register should only be written to during reset of the PCIe block

PF0_CCIX_PDVSEC_PCR_START_ADDR (CPM4_PCIE0_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr11:0rwNormal read/write0x0PF0 CCIX Protocol DVSEC CR Region Start Address