AXISTEN_IF_PASID_UR_CHECK_DISABLE (CPM4_PCIE1_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)
Document ID
AM012
Release Date
2023-08-29
Revision
1.3

AXISTEN_IF_PASID_UR_CHECK_DISABLE (CPM4_PCIE1_ATTR) Register Description

Register NameAXISTEN_IF_PASID_UR_CHECK_DISABLE
Relative Address0x00000000C8
Absolute Address 0x00FCA600C8 (CPM4_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDisable PASID UR Check: When TRUE, disables UR check on PASID for CQ.

This register should only be written to during reset of the PCIe block

AXISTEN_IF_PASID_UR_CHECK_DISABLE (CPM4_PCIE1_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0Disable PASID UR Check: When TRUE, disables UR check on PASID for CQ.